Re: aic7xxx regression occuring after 2.6.12 final

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On Sat, 2005-07-02 at 13:33 -0400, James Bottomley wrote:
> There should be more debugging information after this as the device goes
> through domain validation, isn't there?

There is, but I have to write this out manually. I have only one PC
available. Got myself more paper and a better pen. Here it is:

scsi0 : Adaptec AIC7XXX EISA/VLB/PCI SCSI HBA DRIVER, Rev 6.2.36
        <Adaptec 29160 Ultra160 SCSI adapter>
        aic7892: Ultra160 Wide Channel A, SCSI Id=7, 32/253 SCBs

scsi0: Slave Alloc 0
(scsi0:A:0:0): Sending WDTR 0
(scsi0:A:0:0): Received WDTR 0 filtered to 0
 target0:0:0: FAST-5 SCSI 1.0 MB/s ST (1020 ns, offset 255)
scsi0: target 0 using 8bit transfers
(scsi0:A:0:0): Sending SDTR period 45, offset 0
(scsi0:A:0:0): Received SDTR period 45, offset 0
Filtered to period 0, offset 0
 target0:0:0: asynchronous.
scsi0: target 0 using asynchronous transfers
  Vendor: FUJITSU   Model: MAP3367NP         Rev: 0106
  Type:   Direct-Access                      ANSI SCSI revision: 03
scsi0: Slave Configure 0
 target0:0:0: asynchronous.
scsi0:A:0:0:0: Tagged Queuing enabled.  Depth 32
 target0:0:0: Beginning Domain Validation
(scsi0:A:0:0): Sending WDTR 1
(scsi0:A:0:0): Received WDTR 1 filtered to 1
 target0:0:0: FAST-5 WIDE SCSI 2.0 MB/s ST (1020 ns, offset 255)
scsi0: target 0 using 16bit transfers
(scsi0:A:0:0): Sending SDTR period 45, offset 0
(scsi0:A:0:0): Received SDTR period 45, offset 0
Filtered to period 0, offset 0
 target0:0:0: wide asynchronous
scsi0: target 0 using asynchronous transfers
(scsi0:A:0:0): Sending PPR bus_width 1, period 9, offset 7f, ppr_options
7
(scsi0:A:0:0): Received PPR bus_width 1, period 9, offset 7f,
ppr_options 7
Filtered to width 0, period 0, offset 0, options 0
 target0:0:0: asynchronous.
scsi0: target 0 using 8bit transfers
(scsi0:A:0:0): refuses tagged comands.  Performing non-tagged I/O
 target0:0:0: asynchronous
*PC hangs here*

> James 
Tony.

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