On Wed, 8 Jun 2005, Ashok Raj wrote:
> On Wed, Jun 08, 2005 at 06:32:26AM -0700, Andi Kleen wrote:
> >
> > > I also see one minor weakness in the assumption that CPU Vectors
> > > are global. Both IA64/PARISC can support per-CPU Vector tables.
>
> One thing to keep in mind is that since now we have support for CPU hotplug
> we need to factor in cases when cpu is removed, the per-cpu vectors would
> require migrating to a new cpu far interrupt target. Which would
> possibly require vector-sharing support as well in case the vector is used
> in all other cpus.
>
> Possibly irq balancer might need to be revisited as well, and potentially
> might trigger some sharing needs.
>
> A combination of
> - Not allocating IRQs to pins not used (Which Natalie from Unisys
> submitted)
> http://marc.theaimsgroup.com/?l=linux-kernel&m=111656957923038&w=2
> - per-cpu vector tables (long back i remember seeing some post from sgi
> on the topic, possibly under intr domains etc.. not too sure)
I did something for i386 which setup per node vector tables, i resurrected
it for newer systems (ES7000) but haven't fixed MSI support yet. But that
may not be what you're referring to ;)
> - vector sharing
This might be simpler if we did IRQ handling domains and setup a group of
processors with the same vector tables. That way we just migrate onto one
of the other cpus in the IRQ handling domain. This should also leave
plenty of room for many devices per IRQ handling domain (my reference is
a 4 processor per IRQ domain).
Thanks,
Zwane
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