On Wed, Jun 08, 2005 at 03:37:32PM +0200, Andi Kleen wrote:
> > The issue is, if pci_enable_msix() fails, we want to fall back to MSI,
> > so you need to call pci_enable_msi() for that (after calling
> > pci_disable_msi() before calling pci_enable_msix(), what a mess...)
>
> It is messy in that case, but still preferable to having MSI code
> in every driver. I suppose most devices will not use MSI-X for some time...
I was going to argue the opposite:
New devices are implementing MSI-X, not MSI.
e.g. IB/10GigE implement MSI-X.
But wording in the PCI-[XE] specs forecast what Andi said:
| 2.1.9. Message-Signaled Interrupts
| PCI-X devices are required to support message-signaled interrupts and
| must support a 64-bit message address, as specified in PCI 2.2.
PCI-E 1.0 has similar language:
| 6.1.4. Message Signaled Interrupt (MSI) Support
| The Message Signaled Interrupt (MSI) capability is defined in the
| PCI 2.3 Specification. MSI interrupt support, which is optional for
| PCI 2.3 devices, is required for PCI Express devices. MSI-capable
| devices deliver interrupts by performing memory write transactions.
| MSI is an edge-triggered interrupt; neither the PCI 2.3 Specification
| nor this specification support level-triggered MSI interrupts.
PCI 3.0 spec was the first to mention anything about MSI-X.
PCI-E 1.1 also mentions MSI-X:
| 6.1.4. Message Signaled Interrupt (MSI/MSI-X) Support
| MSI/MSI-X interrupt support, which is optional for PCI 3.0 devices,
| is required for PCI Express devices. All PCI Express devices that
| are capable of generating interrupts must support MSI or MSI-X or both.
| The MSI and MSI-X mechanisms deliver interrupts by performing memory
| write transactions. MSI and MSI-X are edge-triggered interrupt
| mechanisms; neither the PCI Local Bus Specification, Revision 3.0 nor
| this specification support level-triggered MSI/MSI-X interrupts.
My point is that MSI-X is optional (an alternative to MSI).
hth,
grant
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