Below is the code snip that checks for a hardware NPX - which it does OK.
But, how can enabling a 287 ever work in a paged environment? A 287 NPX
only has internal registers capable of handling 16:16 segmented protected
mode addresses. Once paging is enabled and 16:32 addresses start getting
generated I should think everything falls apart. At a minimum, if nothing
else died first, any reported exception CS:IP's would certainly be bogus
having only 16 bits of IP coming back to the 386 from the NPX.
Am I missing something here?
Tony
------------------CUT-------------------
/*
* We depend on ET to be correct. This checks for 287/387.
*/
check_x87:
movb $0,X86_HARD_MATH
clts
fninit
fstsw %ax
cmpb $0,%al
je 1f
movl %cr0,%eax /* no coprocessor: have to set bits */
xorl $4,%eax /* set EM */
movl %eax,%cr0
ret
ALIGN
1: movb $1,X86_HARD_MATH
.byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
ret
-
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