Hi Natalie,
have you taken a look a the Vector Sharing Patch posted by Kaneshige for IA64?
Cheers,
ashok
On Thu, May 19, 2005 at 04:06:13AM -0700, [email protected] wrote:
>
> I suggest to change the way IRQs are handed out to PCI devices.
> Currently, each I/O APIC pin gets associated with an IRQ, no matter if
> the pin is used or not. It is expected that each pin can potentually
> be engaged by a device inserted into the corresponding PCI slot.
> However, this imposes severe limitation on systems that have designs
> that employ many I/O APICs, only utilizing couple lines of each, such
> as P64H2 chipset. It is used in ES7000, and currently, there is no way
> to boot the system with more that 9 I/O APICs. The simple change below
> allows to boot a system with say 64 (or more) I/O APICs, each
> providing 1 slot, which otherwise impossible because of the IRQ gaps
> created for unused lines on each I/O APIC. It does not resolve the
> problem with number of devices that exceeds number of possible IRQs,
> but eases up a tension for IRQs on any large system with potentually
> large number of devices. I only implemented this for the ACPI boot,
> since if the system is this big and
>.. deleted...
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