Alan Cox wrote:
4) It may be worthwhile to rewrite the loop to check the Status register
_first_, then delay.
The 400nS delay after a command is required before status becomes valid.
This isn't about 'incorrect' devices in the command case. It is about
strictly correct behaviour and propogation/response times. For the cases
its not required and you wan to keep PCI load down then checking first
is clearly logical.
The 400nS delay isn't the one in the loop. I was referring to the other
delay.
Putting the Status register read first will also flush out any posted
writes, before delaying, and potentially exit more rapidly if the device
is immediately ready.
Jeff
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