RE: [patch 1/1] Do not enforce unique IO_APIC_ID for Xeon processors in EM64T mode (x86_64)

["Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com>]

> > Looks like the need in the unique id can only be keyed of the local 
> > APIC id, and probably it is a good idea to keep the NO_IOAPIC_CHECK 
> > for subarchs that can override the heuristics?
> 
> I prefer not to do that. How about a simple
> 
> if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && 
> boot_cpu_data.x86 < 15)
> 	/* do uniqueness check */
> else
> 	/* don't do it */
> 
> ?		
> 
> Rationale is that P4s and newer and systems not from Intel 
> don't have serial APIC busses and don't need this uniqueness check.
>

Yes, indeed this looks like the only undisputed (and sufficient)
criteria. I tried the below with Xeon box and it worked fine:

--- mpparse.c.orig	2005-05-11 02:10:35.000000000 -0400
+++ mpparse.c	2005-05-11 02:12:31.000000000 -0400
@@ -912,7 +913,15 @@ void __init mp_register_ioapic (
 	mp_ioapics[idx].mpc_apicaddr = address;
 
 	set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
-	mp_ioapics[idx].mpc_apicid = io_apic_get_unique_id(idx, id);
+	if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
(boot_cpu_data.x86 >= 15))
+		mp_ioapics[idx].mpc_apicid = id;
+	else
+		mp_ioapics[idx].mpc_apicid = io_apic_get_unique_id(idx,
id);
 	mp_ioapics[idx].mpc_apicver = io_apic_get_version(idx);
 	
 	/* 

I am going to test this with Potomacs tonight to be sure, and then can
send the final patch. Does the format look OK?

Thanks,
--Natalie 
-
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