Re: RCU + SMR for preemptive kernel/user threads.

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I think you need a release memory barrier if you store into a hazard
pointer that is non null to prevent prior accesses from occurring after
the store.  That's an extra memory barrier for hazard pointers that I
overlooked. One thing that could be done is wait an extra RCU grace
period after the hazard pointer scan to ensure prior accesses have
completed before freeing the resource.  That would lengthen the delay
to approximately 2 RCU grace periods.  Could be a problem if you have
a high write rate and are trying to keep that delay minimal.

There might be another way.  I'd have to investigate it a little more.


--
Joe Seigh

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