On Fri, 2005-04-08 at 14:17 +1000, Herbert Xu wrote: > On Fri, Apr 08, 2005 at 08:21:28AM +0400, Evgeniy Polyakov wrote: > > > > > > On UP do not. > > > > > > Shouldn't we should be fixing the MIPS implementation of > > > atomic_sub_return to not do the sync on UP then? > > > > Unfortunately not, that sync is required exactly for return value store. > > On UP? Yes, some quotes: The memory access type of a location affects the behavior of I-fetch, load, store, and prefetch operations to the location. In addition, memory access types affect some instruction descriptions. Load linked (LL, LLD) and store conditional (SC, SCD) have defined operation only for locations with cached memory access type. SYNC affects only load and stores made to locations with uncached or cached coherent memory access types. 3. The SC [comment: store conditional] stores a new value into the memory word, unless the new value has been modified. If the word has not been modified, the store succeeds and a 1 is stored in the destination register. Otherwise the Store Conditional fails, memory is not modified, and a 0 is loaded into the destination register. Since the instruction format has only a single field to select a data register (rt), this destination register is the same as the register which was stored. Load Linked and Store Conditional instructions (LL, LLD, SC, and SCD) do not implicitly perform SYNC operations in the R10000 processor. -- Evgeniy Polyakov Crash is better than data corruption -- Arthur Grabowski
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