[PATCH] drivers/net/tulip/: fix for Lite-On 82c168 PNIC (2.6.11)

[Guido Classen <classeng@clagi.de>]

Hi,

this small patch fixes two issues with the Lite-On 82c168 PNIC adapters.
I've tested it with two cards in different machines both chip rev 17

The first is the wrong register address CSR6 for writing the MII register
which instead is 0xB8 (this may get a symbol too?) (see similar exisiting code
at line 437) in tulip_core.c

At least by my cards, the the bit 31 from the MII register seems to be
somewhat unstable. This results in reading wrong values from the Phy-Registers
und prevents the card from correct initialization. I've added a litte delay
and an second test of the bit. If the bit is stil cleared the read/write
process has definitely finished.

Cheers
  Guido

Signed-off-by: Guido Classen <classeng@clagi.de>

diff -ru linux-2.6.11-org/drivers/net/tulip/tulip_core.c 
linux-2.6.11.2-pentium/drivers/net/tulip/tulip_core.c
--- linux-2.6.11-org/drivers/net/tulip/tulip_core.c	2005-04-01 
22:10:03.000000000 +0200
+++ linux-2.6.11.2-pentium/drivers/net/tulip/tulip_core.c	2005-03-31 
23:14:11.000000000 +0200
@@ -1701,8 +1701,8 @@
 			tp->nwayset = 0;
 			iowrite32(csr6_ttm | csr6_ca, ioaddr + CSR6);
 			iowrite32(0x30, ioaddr + CSR12);
-			iowrite32(0x0001F078, ioaddr + CSR6);
-			iowrite32(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
+			iowrite32(0x0001F078, ioaddr + 0xB8);
+			iowrite32(0x0201F078, ioaddr + 0xB8); /* Turn on autonegotiation. */
 		}
 		break;
 	case MX98713:
diff -ru linux-2.6.11-org/drivers/net/tulip/media.c 
linux-2.6.11.2-pentium/drivers/net/tulip/media.c
--- linux-2.6.11-org/drivers/net/tulip/media.c	2005-04-01 22:10:03.000000000 
+0200
+++ linux-2.6.11.2-pentium/drivers/net/tulip/media.c	2005-04-01 
22:05:31.000000000 +0200
@@ -74,8 +74,17 @@
 		ioread32(ioaddr + 0xA0);
 		while (--i > 0) {
 			barrier();
-			if ( ! ((retval = ioread32(ioaddr + 0xA0)) & 0x80000000))
-				break;
+			if ( ! ((retval = ioread32(ioaddr + 0xA0))
+                                & 0x80000000)) {
+                                /* bug in 82c168 rev 17?
+                                 * wait a little while and check if
+                                 * bit 31 is still cleared */
+                                udelay(10);
+                                if ( ! ((retval = ioread32(ioaddr + 0xA0))
+                                        & 0x80000000)) {
+                                        break;
+                                }
+                        }
 		}
 		spin_unlock_irqrestore(&tp->mii_lock, flags);
 		return retval & 0xffff;
@@ -153,8 +162,16 @@
 		iowrite32(cmd, ioaddr + 0xA0);
 		do {
 			barrier();
-			if ( ! (ioread32(ioaddr + 0xA0) & 0x80000000))
-				break;
+			if ( ! (ioread32(ioaddr + 0xA0) & 0x80000000)) {
+                                /* bug in 82c168 rev 17?
+                                 * wait a little while and check if
+                                 * bit 31 is still cleared */
+                                udelay(10);
+                                if ( ! (ioread32(ioaddr + 0xA0)
+                                        & 0x80000000)) {
+                                        break;
+                                }
+                        }
 		} while (--i > 0);
 		spin_unlock_irqrestore(&tp->mii_lock, flags);
 		return;
-
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