Alan Cox wrote:
What about HP PCLan 16/TP+ cards? I have one that runs 24/7 in a 486 box
(2.6.20.6 kernel) and one spare. It has some VLSI HP chip and also ST-NIC
DP83902AV - is that a good candidate for testing?
What are you trying to test. The documentation explicitly says you need
the delays and that the delays are in bus clocks not microseconds. That
means the existing code is correct and it needs a delay dependant on the
ISA bus clock frequency (somewhere between 6 and 12MHz). Note that the
delay depends on the bus clock frequency not time.
We don't do overclocking, we don't support overclocking, please do not
overclock your ethernet chip.
However, assuming a bus clock of 6 MHz should be safe (167 ns).
4 bus clocks would be 667 ns, or we can round it up to 1 ms to deal with
bus delay effects.
None of this really helps with *memory-mapped* 8390, though, since
memory mapped writes can be posted. Putting any IOIO transaction in the
middle has the effect of flushing the posting queues; an MMIO read would
also work. The WD80x3 cards were memory-mapped, in particular (and
were some of the very first cards supported by Linux.)
-hpa
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