On Sun, 30 Dec 2007 19:14:40 +0100
Rene Herman <[email protected]> wrote:
> On 30-12-07 17:48, Alan Cox wrote:
>
> > For processors with TSC I think we should aim for 2.6.25 to do this and
> > to have the major other _p fixups done. I pity whoever does stuff like
> > the scc drivers but most of the rest isn't too bad.
>
> I'm by the way looking at drivers/net/wd.c which my 386 uses for its dual
> mode NE2000/WD8013 clone ISA NIC and while it specifically needs no delay at
> all it seems, the mixed use of out and outb_p seems to suggest that someone
> once thought about that. Would you advice sticking in a udelay(2) manually
> there?
I dug out the reference drivers. The reference drivers use the delay and
the 8390 datasheet confirms it is neccessary.
The Crynwr driver has some interesting things to say
| The National 8390 Chip (NIC) requires 4 bus clocks between successive
| chip selects (National DP8390 Data Sheet Addendum, June 1990)
Also " To establish a minimum delay, an I/O instruction must be used. A
good rule of ; thumb is that ISA I/O instructions take ~1.0 microseconds
and MCA I/O ; instructions take ~0.5 microseconds. Reading the NMI Status
Register (0x61) ; is a good way to pause on all machines."
But all the official drivers use pauses and the manual says they are
needed for correct, reliable behaviour - at least with a genuine 8390.
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