On Wed, Aug 15, 2007 at 09:46:55PM +0200, Segher Boessenkool wrote: > >>>Well if there is only one memory location involved, then smp_rmb() > >>>isn't > >>>going to really do anything anyway, so it would be incorrect to use > >>>it. > >> > >>rmb() orders *any* two reads; that includes two reads from the same > >>location. > > > >If the two reads are to the same location, all CPUs I am aware of > >will maintain the ordering without need for a memory barrier. > > That's true of course, although there is no real guarantee for that. A CPU that did not provide this property ("cache coherence") would be most emphatically reviled. So we are pretty safe assuming that CPUs will provide it. Thanx, Paul - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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