Re: [Linux-fbdev-users] atyfb - system hangs at bootup prior to enabling framebuffer console -- linux 2.6.18 (fwd)

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Andrew please apply.

Acked-By: James Simmons <[email protected]>

---------- Forwarded message ----------
Date: Sat, 17 Feb 2007 15:19:12 +0200
From: Ville Syrjälä <[email protected]>
Reply-To: [email protected]
To: [email protected]
Subject: Re: [Linux-fbdev-users] atyfb - system hangs at bootup prior to
    enabling framebuffer console -- linux 2.6.18

On Fri, Feb 16, 2007 at 06:37:31PM -0500, cga2000 wrote:
> More than 50% of the time my laptop hangs when booting with 
> 
> ... video=atyfb:1400x1050.
> 
> I have seen similar occurrences reported here and there with recent 2.6
> kernels but nothing very clear as to whether this is a known problem or
> whether a patch or workaround has already been provided.

I was just able to reproduce the problem by switching from drivers/ide 
to libata. In my case the laptop would hang on every boot. Apparently 
using libata changed the timing enough to trigger the bug.

Try this patch:

---
 drivers/video/aty/mach64_ct.c |    9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

Index: linux-2.6.20/drivers/video/aty/mach64_ct.c
===================================================================
--- linux-2.6.20.orig/drivers/video/aty/mach64_ct.c
+++ linux-2.6.20/drivers/video/aty/mach64_ct.c
@@ -598,7 +598,6 @@ static void aty_resume_pll_ct(const stru
 	struct atyfb_par *par = info->par;
 
 	if (par->mclk_per != par->xclk_per) {
-		int i;
 		/*
 		* This disables the sclk, crashes the computer as reported:
 		* aty_st_pll_ct(SPLL_CNTL2, 3, info);
@@ -609,12 +608,10 @@ static void aty_resume_pll_ct(const stru
 		aty_st_pll_ct(SCLK_FB_DIV, pll->ct.sclk_fb_div, par);
 		aty_st_pll_ct(SPLL_CNTL2, pll->ct.spll_cntl2, par);
 		/*
-		 * The sclk has been started. However, I believe the first clock
-		 * ticks it generates are not very stable. Hope this primitive loop
-		 * helps for Rage Mobilities that sometimes crash when
-		 * we switch to sclk. (Daniel Mantione, 13-05-2003)
+		 * The sclk has been started. Wait for the PLL to lock. 5 ms
+		 * should be enough according to mach64 programmers guide.
 		 */
-		for (i=0;i<=0x1ffff;i++);
+		mdelay(5);
 	}
 
 	aty_st_pll_ct(PLL_REF_DIV, pll->ct.pll_ref_div, par);
-- 
Ville Syrjälä
[email protected]
http://www.sci.fi/~syrjala/

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