Re: cache coherecy when working with cpu dcache write allocate

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--- saeed bishara <[email protected]> wrote:

> Hi,
>     I came across data corruption problem when using xfs, my system is
> arm 926, the data cache is virtually tagged and virtually indexed and
> with no hw cache coherency. my CPU features the data cache write
> allocate-> when doing store, the cache line of the destination address
> is loaded to data cache.
>   when enabling the write allocate, I got data corruption with the
> xfs. the scenario is that the xfs allocates large buffer (for reading
> the log records) using vmalloc, and the low level driver (raid) copies
> the data to the bio vectors using the linear address, since the write
> allocate is enabled,  the correct data remains on the data cache with
> the linear address tag, when the IO completes, the xfs access the data
> with using the vmalloc virtual address, which is different than the
> kernel linear address, thus it will get a stale data!.
> 
> how should I fix this problem? I thought that only the
> copy/clean_user_pages() functions should be aware to the write
> allocate.
I wonder if I'm seeing this with reiser4 on pxa27x as well???

Steve


		
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