Thomas Hellström wrote:
Hi!
Does anybody have a strong opinion against adding support for
i386 Page Attribute Tables?
The main benefit would be that one can have write-combining memory
regions without setting up MTRRs. This will come in handy for a
device we're working with where the device driver needs to allocate the
display memory directly from system memory, and it may be difficult to
fit
the mtrr alignment constraints.
An additional benefit if that you can easily run out of mtrrs. My home
machine boots with all 8 mtrrs used, leaving none for the G965
graphics. I have to compress two mtrrs into one in order to get decent
performance.
Outline:
The PAT may be set up at boot time with fixed backwards-compatible
memory types for the different PAT entries + defines like the following:
#define _PAGE_PAT_WB xxx
#define _PAGE_PAT_WT xxx
#define _PAGE_PAT_UC0 xxx
#define _PAGE_PAT_UC1 xxx
#define _PAGE_PAT_WC xxx
which can be used in parallel with the old _PAGE_PWT and _PAGE_PCD bits.
The idea is that new memory types, WC for example, will use the pat
entries
7 downto 4, whereas 0-3 are left to boot setting to maintain backwards
compatibility.
Issues:
1) The _PAGE_BIT_PAT will be the same as _PAGE_PSE, and _PAGE_PROTNONE.
As I understand it, _PAGE_PROTNONE is not used when the page is
present, so this might not be an issue.
What about _PAGE_PSE?
pse pages place the pat bit in bit 12, you will need to account for that.
--
Do not meddle in the internals of kernels, for they are subtle and quick to panic.
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