Re: data corruption with nvidia chipsets and IDE/SATA drives (k8 cpu errata needed?)

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On Thu, 18 Jan 2007, Andi Kleen wrote:

The Northbridge guarantees coherency over the aperture, but
only if the caching attributes match.

That's interesting.  Makes sense, I suppose.

You would need to change_page_attr() every kernel address that is mapped into
the  IOMMU to use an uncached aperture. AGP does this, but the frequency of
mapping for the IOMMU  is much higher and it would be prohibitively costly
unfortunately.

But it still might be a reasonable thing to do to test the theory that
the problem is cache coherency across the graphics aperture, even if
it isn't a long-term solution for the problem.

In the past we saw corruptions from such conflicts, so this is more
than just theory. I suspect you traded a more easy to trigger
corruption with a more subtle one.

Yup.  That was the inspiration for the script.

Chip

--
Charles M. "Chip" Coldwell
Senior Software Engineer
Red Hat, Inc
978-392-2426

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