Hi!
Hi!
You can't tell that CPUs behave exactly
probabilistically --- it may
happen that one gets out of the wait loop always too
late.
Well, I don't need them to be _exactly_
probabilistical.
Anyway, if you have 2048 CPUs... you can perhaps get
some non-broken
ones.
No intel document guarantees you that if more CPUs
simultaneously execute locked cmpxchg in a loop that a
If we are talking 2048 cpus, we are talking ia64.
IA64 spinlock is locked cmpxchg, if failed than pause (i386 equivalent of
rep nop) read the value, and if unlocked, try cmpxchg again.
There is no fairness in it.
CPU will see compare success in a finite time. In fact,
CPUs can't guarantee this at all, because they don't
know that they're executing a spinlock --- for them its
just an instruction stream like anything else.
...even i386 has monitor/mwait these days.
It also doesn't guarantee that subsequent locked instruction will take the
lock after finite number of loops.
Mikulas
Pavel
--
Thanks for all the (sleeping) penguins.
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