Re: [patch 13/19] GTOD: Mark TSC unusable for highres timers

* Andrew Morton <[email protected]> wrote:

> If so, could that function use the PIT/pmtimer/etc for working out if 
> the TSC is bust, rather than directly using jiffies?

there's no realiable way to figure out the TSC is bust: some CPUs have a 
slight 'skew' between cores for example. On some systems the TSC might 
skew between sockets. A CPU might break its TSC only once some 
powersaving mode has been activated - which might be long after bootup. 
The whole TSC business is a nightmare and cannot be supported reliably. 
AFAIK Windows doesnt use it, so it's a continuous minefield for new 
hardware to break.

We should wait until CPU makers get their act together and implement a 
TSC variant that is /architecturally promised/ to have constant 
frequency (system bus frequency or whatever) and which never stops.

	Ingo
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Follow-Ups:
- Re: [patch 13/19] GTOD: Mark TSC unusable for highres timers
  - From: Pavel Machek <[email protected]>
- Re: [patch 13/19] GTOD: Mark TSC unusable for highres timers
  - From: Alan Cox <[email protected]>
- Re: [patch 13/19] GTOD: Mark TSC unusable for highres timers
  - From: Andi Kleen <[email protected]>
- Re: [patch 13/19] GTOD: Mark TSC unusable for highres timers
  - From: Andrew Morton <[email protected]>

References:
- [patch 00/21] Highres / dynticks drop in replacement for 2.6.19-rc5-mm1
  - From: Thomas Gleixner <[email protected]>
- [patch 13/19] GTOD: Mark TSC unusable for highres timers
  - From: Thomas Gleixner <[email protected]>
- Re: [patch 13/19] GTOD: Mark TSC unusable for highres timers
  - From: john stultz <[email protected]>
- Re: [patch 13/19] GTOD: Mark TSC unusable for highres timers
  - From: Andi Kleen <[email protected]>
- Re: [patch 13/19] GTOD: Mark TSC unusable for highres timers
  - From: Thomas Gleixner <[email protected]>
- Re: [patch 13/19] GTOD: Mark TSC unusable for highres timers
  - From: Andrew Morton <[email protected]>

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