Re: Can context switches be faster?

Alan Cox wrote:

We already do. The newer x86 processors also have TLB tagging so they
can (if you find one without errata!) avoid the actual flush and instead
track the tag.

Are there any? I think AMD dropped it rather than spend the effort to make it work.

   J

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• References:
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  • Re: Can context switches be faster?
    • From: "Chris Friesen" <[email protected]>
  • Re: Can context switches be faster?
    • From: John Richard Moser <[email protected]>
  • Re: Can context switches be faster?
    • From: Jeremy Fitzhardinge <[email protected]>
  • Re: Can context switches be faster?
    • From: Andreas Mohr <[email protected]>
  • Re: Can context switches be faster?
    • From: Alan Cox <[email protected]>

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