James Bottomley wrote:
Well ... I agree that in principle it's possible to have a kernel that
would run on both voyager and a generic x86 system and, I'll admit, I
tried to go that route before creating the subarchitectures. However,
in practice, I think the cost really becomes too high ... for voyager,
it becomes necessary really to intercept almost the entirety of the the
SMP API. The purpose of the subarchitecture interface wasn't to
eventually have some API description that would allow voyager to
co-exist with more normal x86 systems. It was to allow voyager to make
use of generic x86 while being completely different at the x86 SMP
level. I really don't think there'll ever be another x86 machine that's
as different from the APIC approach as the voyager VIC/QIC is. thus, I
think the actual x86 interface is much better described by mach-generic,
which abstracts out the interfaces necessary to the more standard APIC
based SMP systems.
This is quite true today. But it is entirely possible that support in
Linux for Xen may want to rip out the APIC / IO-APIC entirely, replace
that with event channels, and use different SMP shootdown mechanisms, as
well as having their own special NMI delivery hook. We're also going to
have to make certain parts of the interface extremely efficient, and
we've already got several schemes to remove the penalty of indirection
by being rid of indirect branches - which could be a more broadly used
technique if it proves unintrusive and reliable enough. In that case,
you could basically support Voyager without a subarch, plus or minus one
special hook or two ;)
Zach
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