Signed-off-by: Adrian Bunk <[email protected]>
---
Documentation/arm/IXP4xx | 2 +-
include/asm-arm/arch-ixp4xx/io.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--- linux-2.6.17-mm3-full/Documentation/arm/IXP4xx.old 2006-06-27 20:44:39.000000000 +0200
+++ linux-2.6.17-mm3-full/Documentation/arm/IXP4xx 2006-06-27 20:44:58.000000000 +0200
@@ -85,7 +85,7 @@
2) If > 64MB of memory space is required, the IXP4xx can be
configured to use indirect registers to access PCI This allows
for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus.
- The disadvantadge of this is that every PCI access requires
+ The disadvantage of this is that every PCI access requires
three local register accesses plus a spinlock, but in some
cases the performance hit is acceptable. In addition, you cannot
mmap() PCI devices in this case due to the indirect nature
--- linux-2.6.17-mm3-full/include/asm-arm/arch-ixp4xx/io.h.old 2006-06-27 20:45:06.000000000 +0200
+++ linux-2.6.17-mm3-full/include/asm-arm/arch-ixp4xx/io.h 2006-06-27 20:45:09.000000000 +0200
@@ -38,7 +38,7 @@
* 2) If > 64MB of memory space is required, the IXP4xx can be configured
* to use indirect registers to access PCI (as we do below for I/O
* transactions). This allows for up to 128MB (0x48000000 to 0x4fffffff)
- * of memory on the bus. The disadvantadge of this is that every
+ * of memory on the bus. The disadvantage of this is that every
* PCI access requires three local register accesses plus a spinlock,
* but in some cases the performance hit is acceptable. In addition,
* you cannot mmap() PCI devices in this case.
-
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