On Sat, May 13, 2006 at 05:40:54PM +0530, Krishna Chaitanya wrote:
> Each Processor has its own RAM and the main ARM9 processor can access
> the ARM7 Memory Map through a _Shared RAM_.
>
> In other words, the Memory Map of ARM7 processors is visible to ARM9
> processor.
>
> Finally there are 3 RAMs:
> 1) System RAM (ARM9)
> 2) Shared RAM (the Common Memory)
> 3) Local RAM for ARM7s.
>
> Basically, this is a _flexible_ mechanism to control the _visibility_
> of Each Processor.
>
> And the Memory Controller can do either _cached_ or _non-cached_ operations.
Sounds like a neat system. I am not sure I would know what to do with
one. :)
It does however sound like the methods used for the Cell based systems
might apply reasonably to it. The main OS runs on the main CPU, and
executes tasks on the other processors by transfering the task to them
and retreiving the results later when it is ready.
Len Sorensen
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