On Thu, 30 Mar 2006, Chen, Kenneth W wrote:
> By the way, this is the same thing on x86: look at include/asm-i386/bitops.h:
>
> #define smp_mb__before_clear_bit() barrier()
> #define smp_mb__after_clear_bit() barrier()
>
> A simple compiler barrier, nothing but
> #define barrier() __asm__ __volatile__("": : :"memory")
>
> See, no memory ordering there, because clear_bit already has a LOCK prefix.
And that implies barrier behavior right?
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