Re: Dual core Athlons and unsynced TSCs

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On Thu, Jan 12, 2006 at 05:17:39PM -0500, Lee Revell wrote:
> It's been known for quite some time that the TSCs are not synced between
> cores on Athlon X2 machines and this screws up the kernel's timekeeping,
> as it still uses the TSC as the default time source on these machines.
> 
> This problem still seems to be present in the latest kernels.  What is
> the plan to fix it?  Is the fix simply to make the kernel use the ACPI
> PM timer by default on Athlon X2?

If your BIOS has an ACPI "HPET" table, then the kernel can use the HPET
timer instead.  It doesn't solve the problem for apps or other kernel bits
that use rdtsc directly, but there are other fixes for that floating
around which will hopefully get consideration when they're mature.
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