On Wed, 23 Nov 2005, Alan Cox wrote:
>
> The MSR bits will break things like ECC scrubbing however. That can be
> addressed although the test patch I have just refuses to load EDAC if
> the BIOS writers didn't follow the BIOS guidelines.
>
> Certainly it would be cleaner and easier to save the MSR, scrub and put
> it back than do the fixup magic. Some drivers would need auditing as
> they seem to use locked ops or xchg (implicit lock) to lock with a PCI
> DMA master.
What I suggested to Intel at the Developer Days is to have a MSR (or,
better yet, a bit in the page table pointer %cr0) that disables "lock" in
_user_ space. Ie a lock would be a no-op when in CPL3, and only with
certain processes.
The kernel really isn't that critical. We always need the locks in SMP
(unlike user space, which never needs them if the process isn't threaded),
and in the kernel space we occasionally need it even with UP to protect
against devices. And we _can_ do these instruction rewrites, and they are
even pretty trivial for the non-hotplug case.
User space is actually a lot more important. People spend more time in
user space, and there the lock prefix is much more often totally useless
and cannot just be edited away once per boot.
Linus
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