just after starting core0 of node 1.
YH
Using local APIC timer interrupts.
Detected 12.564 MHz APIC timer.
Booting processor 1/1 rip 6000 rsp ffff81013ff89f58
Initializing CPU#1
masked ExtINT on CPU#1
CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
CPU: L2 Cache: 1024K (64 bytes/line)
CPU 1(2) -> Node 0 -> Core 1
stepping 00
CPU 1: Syncing TSC to CPU 0.
Booting processor 2/2 rip 6000 rsp ffff81023ff11f58
Initializing CPU#2
masked ExtINT on CPU#2 --------------------------------------------here
> -----Original Message-----
> From: Andi Kleen [mailto:[email protected]]
> Sent: Tuesday, June 21, 2005 3:12 PM
> To: YhLu
> Cc: Andi Kleen; [email protected]
> Subject: Re: 2.6.12 with dual way dual core ck804 MB
>
> On Tue, Jun 21, 2005 at 02:41:52PM -0700, YhLu wrote:
> > andi,
> >
> > for the dual way dual core Opteron ck804 MB, the 2.6.12
> still has the
> > timing problem, I still need to add one printk in
> amd_detec_cmp after
> > the phys_proc_id is setup.
>
> It works for me on several dual core systems, except on a
> very big one that seems to run into a scheduler problem.
>
> Where exactly does yours lock up?
>
> -Andi
>
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