Paul Mackerras <[email protected]> schrieb am 29.04.2005, 15:06:54:
> Arnd Bergmann writes:
>
> > Implementation of software load support for the BE iommu. This is very
>
> Could you expand a bit on what "software load support" is? Your
> description is a bit terse.
The Cell processor can put the I/O page table either in memory like
the hashed page table (hardware load) or have the operating system
write the entries into memory mapped CPU registers (software load).
I use the software load mechanism because I know that all I/O page
table entries for the amount of installed physical memory fit into
the IO TLB cache. At the point when we get machines with more than
4GB of installed memory, we can either use hardware I/O page table
access like the other platforms do or dynamically update the I/O
TLB entries when a page fault occurs in the I/O subsystem.
The software load can then use the macros that I have implemented
for the static mapping in order to do the TLB cache updates.
I'll make sure to add the description to the patches when I send them
next time.
Arnd <><
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